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type="text/css"></style> <div id="ct" class="ct2 wp cl"> <div class="mn"> <div class="bm_haa cl"> <div class="bm_h cl"> <a href="http://www.oecr.com/portal.php?mod=rss&catid=57" class="y xi2 rss" target="_blank" title="RSS">订阅</a><h1 class="xs2">文章</h1> </div></div> <div class="kjkjb"> <div class="bm vw" style="margin-bottom:0;"> <div class="h hm"> <div class="zxtoux"><img src="http://www.oecr.com/uc_server/avatar.php?uid=10207&size=small" /></div> <h1 class="ph">STATS ChipPAC将eWLB技术扩展至300mm重构晶圆 </h1> <p class="xg1"> 时间：2010-5-28 23:48<a class="zz" href="home.php?mod=space&uid=10207">作者：乏味</a> 阅读<em id="_viewnum">(1237)</em> 评论: 0</p> <div class="zxfb" ><a href="http://www.oecr.com/portal.php?mod=rss&catid=57" class="y xi2 rss" target="_blank" title="RSS">订阅</a></div> </div> <!--[diy=diysummarytop]--><div id="diysummarytop" class="area"></div><!--[/diy]--> <div class="s"> <div class="ss"><div><span>导读： </span>STATS ChipPAC (新加坡) 已经将嵌入式晶圆级球栅阵列（eWLB）技术扩展至300mm重构晶圆中，并且也成为第一家拥有300mm eWLB晶圆制造能力的公司。</div> </div> <!--[diy=diysummarybottom]--><div id="diysummarybottom" class="area"></div><!--[/diy]--> <div class="d"> <!--[diy=diycontenttop]--><div id="diycontenttop" class="area"></div><!--[/diy]--> <table cellpadding="0" cellspacing="0" class="vwtb"><tr><td id="article_content"><P>STATS ChipPAC (新加坡) 已经将嵌入式晶圆级球栅阵列（eWLB）技术扩展至300mm重构晶圆中，并且也成为第一家拥有300mm eWLB晶圆制造能力的公司。 </P> <P><A href="http://www.oecr.com/data/attachment/portal/201005/28/234739qov84qu4kvdqk274.jpg" target=_blank><IMG src="http://www.oecr.com/data/attachment/portal/201005/28/234739qov84qu4kvdqk274.jpg"></A></P> <P>eWLB技术支持更薄和更小的封装。(来源: STATS ChipPAC)</P> <P>eWLB是一种扇出型（fan-out）晶圆级封装（WLP）技术，由德国的Infineon在2007年首次提出，它整合了传统的前道和后道制造技术。这种方法以平行制程同步处理晶圆上所有的芯片，同步制程只需一个步骤，从而提供了更高的集成度，降低制造成本。随着芯片保护封装的集成度不断提高，外部触点数量大幅度增加，这项技术可为最先进的无线<a href="http://b.oecr.com/sell" target="_blank" class="relatedlink">产品</a>产品和消费<a href="http://electronic.oecr.com" target="_blank" class="relatedlink">电子</a>产品在成本和尺寸上带来更大的好处。该项技术最初被开发出来时，它在电性能和热性能上都获得了提升，相比起传统的引线层压封装(lead-frame laminate package)，它的尺寸也降低了30%。</P> <P>2008年，STATS ChipPAC、Infineon和STMicroelectronics (Geneva)建立了eWLB合作开发关系，目标是创造兼具成本效益和高集成度的晶圆级封装工业标准。通过Infineon对ST和STATS ChipPAC的技术许可协议，主要研发方向是利用一片重构晶圆的两面，提供集成度更高、接触单元数量更多的<a href="http://sensor.oecr.com" target="_blank" class="relatedlink">半导体</a>解决方案。</P> <P>从那时起，STATS ChipPAC已经在eWLB技术上投资了超过1亿美金，该公司目前季度出货量也超过了3万个重构晶圆，其目标是到2010年底成品率达到99%。</P> <P>重构晶圆可采用扇出WLP方案，其尺寸要大于芯片尺寸，同时可利用经济的已经过证明了的批处理<a href="http://optics.oecr.com" target="_blank" class="relatedlink">工艺</a>，STATS ChipPAC的CTO Han Byung Joon表示。采用eWLB的主要好处在于它是更薄、更小的封装方案，并且具有优越的板级可靠性，能为手机和其他手持式应用提供高性能的方案，Han表示。</P> <P><A href="http://www.oecr.com/data/attachment/portal/201005/28/234744ptm43qs3ix8bayei.jpg" target=_blank><IMG src="http://www.oecr.com/data/attachment/portal/201005/28/234744ptm43qs3ix8bayei.jpg"></A></P> <P>嵌入式晶圆级技术能在晶圆级别处理所有操作。</P> <P>“eWLB技术是一种强大的封装，与铜和低k<a href="http://material.oecr.com" target="_blank" class="relatedlink">材料</a>兼容，无铅、无卤素，绿色环保。eWLB不需要基板或凸点（bumping），简化了物流和供应链，从而降低了成本，”他补充说。“通过eWLB合作开发，我们正致力于大量的下一代eWLB方案，包括用于3-D领域。”</P> <P>这项技术已经经过许多手机制造商的验证和采用，能够满足在不断紧缩的封装尺寸内提供更复杂、节能的半导体器件的需求。Han表示，通过与技术伙伴Infineon和STMicroelectronics的联盟，STATS ChipPAC成为目前第一家制造、创新eWLB技术的公司，例如嵌入同一封装的并行器件、超薄eWLB封装和两层金属分布。</P> <P>eWLB技术线路图</P> <P>通过采用更大的晶圆尺寸，该技术能够更进一步优化制造成本，Han指出。“从技术上来讲，eWLB将不断改进，把被动元件如感应器、电阻和电容集成到各种<a href="http://opticalfilm.oecr.com" target="_blank" class="relatedlink">薄膜</a>层中，把主动/被动器件集成到模塑复合物和3-D垂直互连封装中，这些为新的系统级封装（SiP）和3-D堆叠封装开启了额外的设计可能性，”他说。“3-D eWLB技术能实现垂直互连的3-D IC和3-D SiP封装，并且还能植入TSV应用中。”</P> <P>Han预测说，不断提升eWLB产能并转移至300mm晶圆上制造将帮助公司以更低的成本提供更高性能的解决方案。</P></td></tr></table> <!--[diy=diycontentbottom]--><div id="diycontentbottom" class="area"></div><!--[/diy]--> <script src="data/cache/home.js?eOg" type="text/javascript"></script> <div id="click_div"><table cellpadding="0" cellspacing="0" class="atd"> <tr><td> <a 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